Thread Tools
This thread is privately moderated by Jack Crossfire, who may elect to delete unwanted replies.
Jan 21, 2007, 06:14 PM
Registered User
Jack Crossfire's Avatar
Thread OP

PIC 18f458 terrorism

Though still not working, we have more information on the JTAG problem.

1) The parport has 4 modes: Output only, bidirectional, EPP, CPP. JTAG only generates useful signals in the bidirectional mode.

2) The JTAG programmer, CAPS, doesn't work with the PEP driver. You have to use the JTD driver in single CPU mode. A note about single CPU mode is in

3) CAPS can't detect a useful JTAG clock speed on its own. You need to override the JTAG clock speed by first booting CAPS, then editing uPSDsoft.ini and changing TCK1 to a useful speed, then entering the HW
Setup dialog. Editing it any other time doesn't work. TCK1 is a hex clockspeed in khz. Even then, the minimum clockspeed is 1khz.

4) You have to run "Reset Target" from the main menu before every JTAG test.

With more useful parport output achieved, the next problem was getting JTAG data from the STR9 back into the parport. The STR9 generates more useful JTAG output than last week, but the bridge that inverts the JTAG data before sending it to the parport is generating garbage. It's non-inverted and appears to contain a reflection, but it would have to be the slowest reflection ever recorded.

All the other signals are passing through the bridge properly. JTAG data out is pulled up as it should be.

To save money and time, a PIC18F458 is supposed to be debouncing and performing all the functions of a flashlink JTAG cable in software. That limits the maximum clockspeed significantly but these glitches are way below that minimum.
Last edited by Jack Crossfire; Jan 21, 2007 at 06:32 PM.
Sign up now
to remove ads between posts

Quick Reply
Thread Tools