FrSky D16 protocol (X series TX/RX compatible) - Page 2

jry · , 02:18 PM

Great!!!

First post updated with x4rsb_thr_up.zip. First significant differences are from Packet ID 14327.

midelic · , 02:55 PM

What I discovered until now is that Frsky X protocol is based on Kyrre Aalerud ideas of implementation.Basically he improved parts of original Frsky code when he published it first time.Some implementation on X protocol are very similar.Now, or he worked for Frsky or somebody copied .

midelic · 04:59 PM

Some comparison of 2 data frame blocks coming in one block 4 consecutive frames there is frame counter
counter=(frame[4]+12)%47
It looks like 16 channels data is encoded in 2 frames.

Code:

Throttle down                                               Throttle UP
0x08	0x14	0x20	0x2C			0x08	0x14	0x20	0x2C   counter
0x03	0x03	0x03	0x03			0x03	0x03	0x03	0x03
0x02	0x02	0x02	0x02			0x02	0x02	0x02	0x02
0x00	0x00	0x00	0x00			0x00	0x00	0x00	0x00
0x00	0x00	0x00	0x00			0x00	0x00	0x00	0x00
									
0x00	0x00	0x02	0x00			0x00	0x00	0x00	0x00
0x08	0x21	0x01	0x08			0x48	0x27	0x08	0x27
0x40	0x40	0x80	0x40			0x40	0x40	0x80	0x40
0x02	0x01	0x00	0x02			0x01	0x00	0x00	0x01
0x04	0x04	0x08	0x04			0x14	0xF8	0x04	0xF4
0x80	0x40	0x80	0x40			0x40	0x3F	0x80	0x3F
0xFA	0x00	0xFA	0x00			0xF9	0xFB	0x00	0xFA
0x03	0x08	0x03	0x08			0x03	0x03	0x08	0x03
0x10	0x80	0x10	0x80			0x80	0x10	0x80	0x10
0x00	0x00	0x00	0x00			0x00	0x00	0x00	0x00
0x01	0x08	0x01	0x08			0x08	0x01	0x08	0x01
0x10	0x80	0x10	0x80			0x80	0x10	0x80	0x10
0x02	0x13	0x20	0x31			0x00	0x01	0x42	0x23

midelic · 03:11 PM

To summarize what I found so far.
See below full data frames with Throttle down.

Code:

counter=(frame[4]+12)%47;

LENGTH	0	0x1D	0x1D	0x1D	0x1D		0x1D	0x1D	0x1D		0x1D	0x1D	0x1D	0x1D
TXID0	1	0XDD	0XDD	0XDD	0XDD		0XDD	0XDD	0XDD		0XDD	0XDD	0XDD	0XDD
TXID1	2	0X6D	0X6D	0X6D	0X6D		0X6D	0X6D	0X6D		0X6D	0X6D	0X6D	0X6D
	3	0x02	0x02	0x02	0x02		0x02	0x02	0x02		0x02	0x02	0x02	0x02
counter	4	0x0A	0x16	0x22	0x2E		0x0B	0x17	0x23		0x00	0x0C	0x18	0x24
	5	0x03	0x03	0x03	0x03		0x03	0x03	0x03		0x03	0x03	0x03	0x03
	6	0x02	0x02	0x02	0x02		0x02	0x02	0x02		0x02	0x02	0x02	0x02
	7	0x00	0x00	0x00	0x00		0x00	0x00	0x00		0x00	0x00	0x00	0x00
	8	0x00	0x00	0x00	0x00		0x00	0x00	0x00		0x00	0x00	0x00	0x00
DATA0	9	0x02	0x00	0x01	0x00		0x00	0x01	0x04		0x02	0x00	0x04	0x01
DATA1	10	0x01	0x08	0x11	0x01		0x08	0x01	0xD1		0x01	0x28	0x01	0xD1
DATA2	11	0x80	0x40	0x40	0x80		0x40	0x80	0x3F		0x40	0x40	0x80	0x3F
DATA3	12	0x00	0x00	0x00	0x00		0x00	0x00	0x01		0x00	0x01	0x00	0x00
DATA4	13	0x08	0x04	0x18	0x04		0x08	0x04	0x04		0xD8	0x34	0x08	0x04
DATA5	14	0x40	0x80	0x40	0x40		0x80	0x40	0x80		0x3F	0x40	0x40	0x80
DATA6	15	0x00	0xFA	0x00	0xFA		0xF9	0xFB	0xF7		0x00	0xF9	0xFA	0x00
DATA7	16	0x08	0x03	0x08	0x03		0x03	0x03	0x03		0x08	0x03	0x03	0x08
DATA8	17	0x80	0x10	0x80	0x10		0x80	0x10	0x80		0x10	0x80	0x10	0x80
DATA9	18	0x00	0x00	0x00	0x00		0x00	0x00	0x00		0x00	0x00	0x00	0x00
DATA10	19	0x08	0x01	0x08	0x01		0x08	0x01	0x08		0x01	0x08	0x01	0x08
DATA11	20	0x80	0x10	0x80	0x10		0x80	0x10	0x80		0x10	0x80	0x10	0x80
	21	0x32	0x33	0x70	0x11		0x12	0x53	0x30		0x01	0x12	0x13	0x50
	22	0x00	0x00	0x00	0x00		0x00	0x00	0x00		0x00	0x00	0x00	0x00
	23	0x00	0x00	0x00	0x00		0x00	0x00	0x00		0x00	0x00	0x00	0x00
	24	0x00	0x00	0x00	0x00		0x00	0x00	0x00		0x00	0x00	0x00	0x00
	25	0x00	0x00	0x00	0x00		0x00	0x00	0x00		0x00	0x00	0x00	0x00
	26	0x00	0x00	0x00	0x00		0x00	0x00	0x00		0x00	0x00	0x00	0x00
	27	0x00	0x00	0x00	0x00		0x00	0x00	0x00		0x00	0x00	0x00	0x00
CHKSUM1	28	0x51	0x8C	0x0C	0x63		0x5C	0xB8	0xCA		0x14	0x39	0x2C	0x9F
CHKSUM2	29	0xB9	0x08	0x9F	0xFD		0x50	0x46	0x4C		0xBB	0xFD	0xFF	0xFB
														
RSSI	30	0x0B	0x14	0x1B	0x1B		0x19	0x13	0x0E		0x12	0x11	0x0A	0x0F
LQI/CRC	31	0xB0	0xB0	0xB2	0xB2		0xB1	0xB2	0xB1		0xB1	0xAD	0xB2	0xB2

jry · , 02:29 AM

Quote:

Originally Posted by midelic

2.Loading FSCAL registers with precalibration data before each channel hop. allowing code working faster.
This is KA hand or somebody copycat .
...
What I discovered until now is that Frsky X protocol is based on Kyrre Aalerud ideas of implementation.Basically he improved parts of original Frsky code when he published it first time.Some implementation on X protocol are very similar.Now, or he worked for Frsky or somebody copied .

Don't forget SimonChambers - he described D8 protocol in mentioned thread.

Calibration at startup and saving FSCAL registers results is described in CC2500 documentation: 31.2 Frequency Hopping and Multi-Channel Systems (page 55).

midelic · 04:08 PM

SImon Chambers maybe if I remember last time he said he collaborate with Frsky
About calibration Yes it is but I didn't see it in first original Frsky implementation.Maybe they add later. I saw it first time in KA code along with skipping channels.

Ok.
See also arrangement with throttle up.

Code:

LENGTH	0	0x1D	0x1D	0x1D	0x1D		0x1D	0x1D	0x1D	0x1D
TXID0	1	0xDD	0xDD	0xDD	0xDD		0xDD	0xDD	0xDD	0xDD
TXID1	2	0x6d	0x6d	0x6d	0x6d		0x6d	0x6d	0x6d	0x6d
	3	0x02	0x02	0x02	0x02		0x02	0x02	0x02	0x02
counter	4	0x08	0x14	0x20	0x2C		0x09	0x15	0x21	0x2D
	5	0x03	0x03	0x03	0x03		0x03	0x03	0x03	0x03
	6	0x02	0x02	0x02	0x02		0x02	0x02	0x02	0x02
	7	0x00	0x00	0x00	0x00		0x00	0x00	0x00	0x00
	8	0x00	0x00	0x00	0x00		0x00	0x00	0x00	0x00
DATA0    9	0x00	0x00	0x00	0x00		0x00	0x00	0x00	0x00
DATA1	10	0x48	0x27	0x08	0x27		0x48	0x07	0x38	0x07
DATA2	11	0x40	0x40	0x80	0x40		0x40	0x80	0x40	0x80
DATA3	12	0x01	0x00	0x00	0x01		0x00	0x01	0x00	0x01
DATA4	13	0x14	0xF8	0x04	0xF4		0x08	0x04	0x08	0x04
DATA5	14	0x40	0x3F	0x80	0x3F		0x40	0x80	0x40	0x80
DATA6	15	0xF9	0xFB	0x00	0xFA		0x00	0xFB	0xF8	0xFB
DATA7	16	0x03	0x03	0x08	0x03		0x08	0x03	0x03	0x03
DATA8	17	0x80	0x10	0x80	0x10		0x80	0x10	0x80	0x10
DATA9	18	0x00	0x00	0x00	0x00		0x00	0x00	0x00	0x00
DATA10	19	0x08	0x01	0x08	0x01		0x08	0x01	0x08	0x01
DATA11	20	0x80	0x10	0x80	0x10		0x80	0x10	0x80	0x10
????	21	0x00	0x01	0x42	0x23		0x20	0x61	0x62	0x03
	22	0x00	0x00	0x00	0x00		0x00	0x00	0x00	0x00
	23	0x00	0x00	0x00	0x00		0x00	0x00	0x00	0x00
	24	0x00	0x00	0x00	0x00		0x00	0x00	0x00	0x00
	25	0x00	0x00	0x00	0x00		0x00	0x00	0x00	0x00
	26	0x00	0x00	0x00	0x00		0x00	0x00	0x00	0x00
	27	0x00	0x00	0x00	0x00		0x00	0x00	0x00	0x00
CHKSUM1	28	0xD8	0xA8	0xDD	0x30		0x62	0x75	0x49	0xF5
CHKSUM2	29	0xFD	0x28	0xBF	0x81		0x2A	0x18	0xA9	0x54
										
RSSI	30	0x4F	0x09	0x09	0x0F		0x09	0x0C	0x18	0x0F
LQI/CRC	31	0xB2	0xB1	0xB1	0xB0		0xB1	0xB0	0xB2	0xAF

midelic · , 03:20 AM

If you have possibility a spi comm dump from XJTwill be helpful.

When I get back home iI will test code for TX side and a will feed different data bytes and check on an X4 see what is coming out.

FranciscoB · , 08:19 AM

Subscribed

jry · , 08:40 PM

Done! First post updated with xjt_x4rsb.zip and description - xjt_x4rsb.txt.

This time I used OpenTX to set output channels to 0/+100.
GDO0 is included in both XJT and X4R-SB captured data.
Both TX/RX flashed with latest non-EU firmware.

midelic · , 02:54 AM

Can you make .csv list before?

jry · , 03:11 AM

Midelic, I can, but is there any reason why not use Seale Logic software and export SPI on your computer? I wanted to keep attachment size as small as possible.

midelic · , 03:17 AM

Yes the reason is I'm not at home I'm at work and using company computer..I cannot install Salea logic software because of company firewall.I wanted to do some work in advance,If not I can do it when I get back home in 3 weeks.
I can give you my email and sent to me by mail if you want. and keep your attachments here smaller.Let me know .

jry · , 03:22 AM

OK, I will export it. Is there any size limit per post or thread or person on rcgroups?

midelic · , 03:29 AM

I don't think so.
I know about the limit by file type.Try put them all in a zip file.

jry · , 03:31 AM

Download xjt_x4rsb_csv.zip from first post.

Sep 20, 2015, 05:40 AM #18
midelic
midelic Registered User	Some comparison of 2 data frame blocks coming in one block 4 consecutive frames there is frame counter counter=(frame[4]+12)%47 It looks like 16 channels data is encoded in 2 frames. Code: Throttle down Throttle UP 0x08 0x14 0x20 0x2C 0x08 0x14 0x20 0x2C counter 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x02 0x00 0x00 0x00 0x00 0x00 0x08 0x21 0x01 0x08 0x48 0x27 0x08 0x27 0x40 0x40 0x80 0x40 0x40 0x40 0x80 0x40 0x02 0x01 0x00 0x02 0x01 0x00 0x00 0x01 0x04 0x04 0x08 0x04 0x14 0xF8 0x04 0xF4 0x80 0x40 0x80 0x40 0x40 0x3F 0x80 0x3F 0xFA 0x00 0xFA 0x00 0xF9 0xFB 0x00 0xFA 0x03 0x08 0x03 0x08 0x03 0x03 0x08 0x03 0x10 0x80 0x10 0x80 0x80 0x10 0x80 0x10 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x08 0x01 0x08 0x08 0x01 0x08 0x01 0x10 0x80 0x10 0x80 0x80 0x10 0x80 0x10 0x02 0x13 0x20 0x31 0x00 0x01 0x42 0x23
	Last edited by midelic; Sep 27, 2015 at 04:59 PM.

Sep 20, 2015, 02:19 PM #19
midelic
midelic Registered User	To summarize what I found so far. See below full data frames with Throttle down. Code: counter=(frame[4]+12)%47; LENGTH 0 0x1D 0x1D 0x1D 0x1D 0x1D 0x1D 0x1D 0x1D 0x1D 0x1D 0x1D TXID0 1 0XDD 0XDD 0XDD 0XDD 0XDD 0XDD 0XDD 0XDD 0XDD 0XDD 0XDD TXID1 2 0X6D 0X6D 0X6D 0X6D 0X6D 0X6D 0X6D 0X6D 0X6D 0X6D 0X6D 3 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 counter 4 0x0A 0x16 0x22 0x2E 0x0B 0x17 0x23 0x00 0x0C 0x18 0x24 5 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 6 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 7 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 8 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 DATA0 9 0x02 0x00 0x01 0x00 0x00 0x01 0x04 0x02 0x00 0x04 0x01 DATA1 10 0x01 0x08 0x11 0x01 0x08 0x01 0xD1 0x01 0x28 0x01 0xD1 DATA2 11 0x80 0x40 0x40 0x80 0x40 0x80 0x3F 0x40 0x40 0x80 0x3F DATA3 12 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x01 0x00 0x00 DATA4 13 0x08 0x04 0x18 0x04 0x08 0x04 0x04 0xD8 0x34 0x08 0x04 DATA5 14 0x40 0x80 0x40 0x40 0x80 0x40 0x80 0x3F 0x40 0x40 0x80 DATA6 15 0x00 0xFA 0x00 0xFA 0xF9 0xFB 0xF7 0x00 0xF9 0xFA 0x00 DATA7 16 0x08 0x03 0x08 0x03 0x03 0x03 0x03 0x08 0x03 0x03 0x08 DATA8 17 0x80 0x10 0x80 0x10 0x80 0x10 0x80 0x10 0x80 0x10 0x80 DATA9 18 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 DATA10 19 0x08 0x01 0x08 0x01 0x08 0x01 0x08 0x01 0x08 0x01 0x08 DATA11 20 0x80 0x10 0x80 0x10 0x80 0x10 0x80 0x10 0x80 0x10 0x80 21 0x32 0x33 0x70 0x11 0x12 0x53 0x30 0x01 0x12 0x13 0x50 22 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 23 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 24 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 25 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 26 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 27 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 CHKSUM1 28 0x51 0x8C 0x0C 0x63 0x5C 0xB8 0xCA 0x14 0x39 0x2C 0x9F CHKSUM2 29 0xB9 0x08 0x9F 0xFD 0x50 0x46 0x4C 0xBB 0xFD 0xFF 0xFB RSSI 30 0x0B 0x14 0x1B 0x1B 0x19 0x13 0x0E 0x12 0x11 0x0A 0x0F LQI/CRC 31 0xB0 0xB0 0xB2 0xB2 0xB1 0xB2 0xB1 0xB1 0xAD 0xB2 0xB2
	Last edited by midelic; Oct 01, 2015 at 03:11 PM.

Sep 21, 2015, 03:09 AM #21
midelic
midelic Registered User	SImon Chambers maybe if I remember last time he said he collaborate with Frsky About calibration Yes it is but I didn't see it in first original Frsky implementation.Maybe they add later. I saw it first time in KA code along with skipping channels. Ok. See also arrangement with throttle up. Code: LENGTH 0 0x1D 0x1D 0x1D 0x1D 0x1D 0x1D 0x1D 0x1D TXID0 1 0xDD 0xDD 0xDD 0xDD 0xDD 0xDD 0xDD 0xDD TXID1 2 0x6d 0x6d 0x6d 0x6d 0x6d 0x6d 0x6d 0x6d 3 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 counter 4 0x08 0x14 0x20 0x2C 0x09 0x15 0x21 0x2D 5 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 6 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 7 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 8 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 DATA0 9 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 DATA1 10 0x48 0x27 0x08 0x27 0x48 0x07 0x38 0x07 DATA2 11 0x40 0x40 0x80 0x40 0x40 0x80 0x40 0x80 DATA3 12 0x01 0x00 0x00 0x01 0x00 0x01 0x00 0x01 DATA4 13 0x14 0xF8 0x04 0xF4 0x08 0x04 0x08 0x04 DATA5 14 0x40 0x3F 0x80 0x3F 0x40 0x80 0x40 0x80 DATA6 15 0xF9 0xFB 0x00 0xFA 0x00 0xFB 0xF8 0xFB DATA7 16 0x03 0x03 0x08 0x03 0x08 0x03 0x03 0x03 DATA8 17 0x80 0x10 0x80 0x10 0x80 0x10 0x80 0x10 DATA9 18 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 DATA10 19 0x08 0x01 0x08 0x01 0x08 0x01 0x08 0x01 DATA11 20 0x80 0x10 0x80 0x10 0x80 0x10 0x80 0x10 ???? 21 0x00 0x01 0x42 0x23 0x20 0x61 0x62 0x03 22 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 23 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 24 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 25 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 26 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 27 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 CHKSUM1 28 0xD8 0xA8 0xDD 0x30 0x62 0x75 0x49 0xF5 CHKSUM2 29 0xFD 0x28 0xBF 0x81 0x2A 0x18 0xA9 0x54 RSSI 30 0x4F 0x09 0x09 0x0F 0x09 0x0C 0x18 0x0F LQI/CRC 31 0xB2 0xB1 0xB1 0xB0 0xB1 0xB0 0xB2 0xAF
	Last edited by midelic; Sep 27, 2015 at 04:08 PM.

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Sep 19, 2015, 02:18 PM #16
jry
jry Registered User Thread OP	Great!!! First post updated with x4rsb_thr_up.zip. First significant differences are from Packet ID 14327.

Sep 19, 2015, 02:55 PM #17
midelic
midelic Registered User	What I discovered until now is that Frsky X protocol is based on Kyrre Aalerud ideas of implementation.Basically he improved parts of original Frsky code when he published it first time.Some implementation on X protocol are very similar.Now, or he worked for Frsky or somebody copied .

Sep 21, 2015, 03:20 AM #22
midelic
midelic Registered User	If you have possibility a spi comm dump from XJTwill be helpful. When I get back home iI will test code for TX side and a will feed different data bytes and check on an X4 see what is coming out.

Sep 21, 2015, 08:19 AM #23
FranciscoB
FranciscoB Registered User	Subscribed

Sep 21, 2015, 08:40 PM #24
jry
jry Registered User Thread OP	Done! First post updated with xjt_x4rsb.zip and description - xjt_x4rsb.txt. This time I used OpenTX to set output channels to 0/+100. GDO0 is included in both XJT and X4R-SB captured data. Both TX/RX flashed with latest non-EU firmware.

Sep 22, 2015, 02:54 AM #25
midelic
midelic Registered User	Can you make .csv list before?

Sep 22, 2015, 03:11 AM #26
jry
jry Registered User Thread OP	Midelic, I can, but is there any reason why not use Seale Logic software and export SPI on your computer? I wanted to keep attachment size as small as possible.

Sep 22, 2015, 03:17 AM #27
midelic
midelic Registered User	Yes the reason is I'm not at home I'm at work and using company computer..I cannot install Salea logic software because of company firewall.I wanted to do some work in advance,If not I can do it when I get back home in 3 weeks. I can give you my email and sent to me by mail if you want. and keep your attachments here smaller.Let me know .

Sep 22, 2015, 03:22 AM #28
jry
jry Registered User Thread OP	OK, I will export it. Is there any size limit per post or thread or person on rcgroups?

Sep 22, 2015, 03:29 AM #29
midelic
midelic Registered User	I don't think so. I know about the limit by file type.Try put them all in a zip file.

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Sep 22, 2015, 03:31 AM #30
jry
jry Registered User Thread OP	Download xjt_x4rsb_csv.zip from first post.