Your circuit has a defect and the boot straps do not work correct. To run the motor Q1 and Q4 have to be on or pulsed and Q2 and Q3 totally off. In this case the boot strap for IC1 does not work as Q2 is not pulsing so Q1 will not turn on.

A solution would be to replace the boot strap circuits with a 9 volt DC power supply connected to the boot pins of the IC1 and IC2 modules and the 24 volt power supply. This would be 33 volts at the boot pins. A 9 volt supply is just a 9 volt battery.

And another point is to connect a small capacitor across the motor to reduce the noise from the brushes. Without the cap the FETs will go boom.

I don't think a little brush noise will result in voltage excursions that exceed the max ratings

of the fets, if derated properly. Might be good to look at snubbers, though. Many different config.

Another easy way to do this, other than P/N fets, is a single ended ESC, and DPDT relay

to handle reverse. KISS syndrome!

Originally Posted by jglenn

I don't think a little brush noise will result in voltage excursions that exceed the max ratings of the fets, if derated properly.

Have you ever connected a scope to a motor and measured the voltage excursions? Even the cheapest toys have caps across the motor leads and if anyone would cut corners they would.

Boot strap circuits are basically charge pumps and need to be pulsing to work. The schematic might work if the charge pump of IC1 was connected to Q4 and IC2's charge pump was connected to Q2. Also at WOT the charge pumps still need to be pulsed so the FETs cannot be turned on in a static manner for long times. Depending on how large C4 and C5 are they could maintain a voltage for several minutes but eventually there will be smoke.

Your circuit has a defect and the boot straps do not work correct. To run the motor Q1 and Q4 have to be on or pulsed and Q2 and Q3 totally off. In this case the boot strap for IC1 does not work as Q2 is not pulsing so Q1 will not turn on.

You are suggesting that for a given driver's HIGH-SIDE to pulse, the same driver's LOW-SIDE must also be pulsing. I don't know that the bootstrap requires this? I'm interested if this is the case, but I'm not sure that it is, because this datasheet hints that this driver is designed for "unique drive schemes" which I read to mean there may be some bizarre timing between low/high side pulses.

And another point is to connect a small capacitor across the motor to reduce the noise from the brushes. Without the cap the FETs will go boom.

I am testing with a resistive load to eliminate motor spikes as a source of error.

Also at WOT the charge pumps still need to be pulsed so the FETs cannot be turned on in a static manner for long times.

I have thus far tested with a 50% duty cycle, so the outputs are always pulsed and never held steady-on.

I have some more parts coming and I'm going to actually put some ang-in-eering effort into this go around. I'll post a schematic before I dive into building.

When the low side driver is pulsing pin 1 of the driver module should have pulses from 0 volts to Ve (high side voltage). This pumps a voltage equal to Vcc + Ve on C4. The gate drive required on Q1 is Vcc + Ve, assuming Vcc is enough to turn on Q1. If you look at the spec sheet for the IR2130 the circuit is more clear.

Given that Q1 and Q4 are being PWM to run the motor, it would be possible to turn on turn on Q4 all the time and only PWM Q1. Then Q2 could be turned on whenever Q1 is off drive the boot straps.

With BLDC motors the FETs are being pulsed all the time even at WOT so there is no problem with the boot strap capacitors dying. In your circuit WOT is a static state and the boot strap capacitors will decay to zero volts.

You must turn on the high side FET's hard ( no pwm ) the low side is the only ones you pwm. The gate voltage on the high side must be approx 10-15 volts higher than Vcc to turn on the FETs properly.

Originally Posted by 7500rpm

You must turn on the high side FET's hard ( no pwm ) the low side is the only ones you pwm. The gate voltage on the high side must be approx 10-15 volts higher than Vcc to turn on the FETs properly.

That would be true for a BLDC ESC. Pulsing the low side drivers is what pumps the boot strap circuits and I guess more pulses would be better. Although at WOT both the high and low side drivers are not PWM and the commutation switching does the pumping.

For the circuit in question here, the low side driver is connected to a different driver module and does not pump the boot strap circuit for the high side driver. Ignoring everything else but the boot strap circuit, it is irrelevant whether the low side driver is on hard or pulsed

He is building a brushed speed control, I always build a a separate supply voltage to run the high side this way you have only one FET in the bridge being PWM and the high side turned on hard, more efficient, and less heat from transitioning. Novak reversing controllers were this way and so were Tekin units too.

Originally Posted by 7500rpm

He is building a brushed speed control, I always build a a separate supply voltage to run the high side this way you have only one FET in the bridge being PWM and the high side turned on hard, more efficient, and less heat from transitioning. Novak reversing controllers were this way and so were Tekin units too.

Is there a name for this separate high-side voltage supply? Charge pump relies on being intermittent, so the high-sides can't be turned on 100% duty cycle.

What is your main battery voltage you are using to power the Brushed motor with?

Originally Posted by 7500rpm

What is your main battery voltage you are using to power the Brushed motor with?

7.2V now. Maybe up to 11-12V if I need more zoom.

Originally Posted by CombatWombat

7.2V now. Maybe up to 11-12V if I need more zoom.

If you only need low voltage operation then it might be easier to use complementary FETs, with simple level shifters driving them.

The IRF5210 is a good match to the IRF540, but others with lower RDSon are available.

The boot straps do have to be connected to the low side drivers, they can be connected to any oscillator that swings from 0 to the high side voltage. For this application a 555 timer circuit running at about 10 KHz would work.

Welp. Version2 is done. And it's pretty damn close to working. But... not quite.

See it here.
Schematic Here.
*Note that I removed R5 and R7 as well.

Everything is switching cleanly. Nice square waves input. Nice square waves output. Mosfets that should be OFF are, in fact, staying off. Nothing getting remotely warm.

Only problem: my high-side V-gate-to-source is only reaching ~3.8V. My mosfets need 4.5+ to turn on (they are logic type). I find my mosfet total gate capacitance to be somewhere around 7000pF (31nC at 4.5V). The driver datasheet says Cboot should be > Qgate/Vdroop. So that's 31e-9C / 0.1V = 3.1e-7 or 0.31uF. It also says Cboot should not exceed 1.2uF. I am using 1.0uF, so I'd say that should be plenty.

Highside: Gate-Source - Voltage Readout
HighSide: Gate-Source - Freq Readout
LowSide: Gate-Source(Gnd) - Voltage Readout
LowSide: Gate-Source(Gnd) - Freq Readout

If I watch Cboot with the highside Mosfet held low, I get a steady 4.5V. Why would this not go up to the full 5V supply of the driver? Some kind of internal drop in their level-switcher-doodad?

If I watch Cboot with the highside Mosfet PWM active, I get a steady 3.8V. With the scope set to AC-coupling and 10mV scale, I find only 25mV transients matching the repetition of the PWM (109hz). edit: (The transients are a bit weird, though, because the voltage increases very slowly over the span of PWM=OFF and then drops rapidly at the GateCharge Event. Almost like the driver has a large internal resistance in it's Cboot-charging-thingy. (But I need to setup a 2nd probe so I can trigger off the PWM rising edge to really confirm that my timing guess is right).

To eliminate the possiblity of Cboot being too small, I laid another 1uF directly on top of it (paralleling to 2uF) and I get identical results.
I then tried laying a 22uF on top of it. With identical results.

I tried removing R5/R7 (the Gate-Source 10k resistors on high side) to eliminate them as leaking too much current. Operation remained identical.

Increasing PWM frequency makes things worse.
Changing Duty Cycle has negligible effect. Even a 1/255 duty cycle results in only 3.8Vgs.
Load is still a simple resistor.

Ideas? Next time. P-Channel highsides

If I watch Cboot with the highside Mosfet held low, I get a steady 4.5V. Why would this not go up to the full 5V supply of the driver? Some kind of internal drop in their level-switcher-doodad?

Most often there is a diode connected between the supply pin and the boot pin and that is how the cap is charged. The free end is pulled low by the low side mosfet and the cap is charged to one diode drop below the supply voltage. The diode is usually a schottky to minimize voltage drop and some drivers require an external diode because it is hard to build a good internal schottky.

You should not have the 10k resistors on the high side mosfets.

What mosfets are you using?