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Old Nov 06, 2012, 08:46 AM
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Everything in your log looks good, except, as you noted, it didn't enter bind mode.
A few things to try:
in dsm2.c, change build_bind_packet() to match what your Dx4e sends. Even better would be if you could capture the bind sequence for the Dx4e and post it.
You would want to try matching the GUID of your DX4e, and also bytes 10, 11, 12, and 13 of the bind packet.

The only DSMX receiver I have is the one I'm working with. You could also try sending packet[12] as 0x01 to force it to enter DSM2 mode to see if that changes anything. I'd also try GUIDs with non-zero in all 4 bytes, to ensure there isn't an invalid range of the GUID.
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Old Nov 06, 2012, 02:17 PM
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Here is the capture sequence of the dx4e with register annotations.
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Old Nov 06, 2012, 02:42 PM
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Quote:
Originally Posted by printk View Post
Here is the capture sequence of the dx4e with register annotations.
So this looks like the bind packet:
Code:
1C  10  CB  01  1C  10  CB  01  03  60  01  06  A2  00  04  6C
GUID: 0x1C10CB01
#chan=6
encoding=0xA2

I don't see why my RPi code wouldn't work, but try running with:
guid=470862593
and modify num_channels in main.c to 6
and see if it helps.

I'll try that sequence when I am back at my bench and see if it works with the RX6210
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Last edited by PhracturedBlue; Nov 06, 2012 at 02:49 PM.
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Old Nov 06, 2012, 02:58 PM
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Will do the test with new sequence when I get back to the my RPi.
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Old Nov 06, 2012, 06:44 PM
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Quote:
Originally Posted by printk View Post
racerxky,

The duplicate channel is the start of the sequence. I think the OP means after the
23 channel sequence, it will loop from the 1st channel again. It is the same 23
channel sequence repeating. He only list the first duplicate channel to save space.
I was trying to point out that at last one sequence has a repeat thats not the beginning of a new cycle:

a1d75ce4: 61 25 19 29 49 9 3 41 27 15 31 5 63 21 39 33 65 57 47 67 69 55 61 19
Duplicate Channel: 61
Duplicate Channel: 19

This sequence is the only one with higher order bits set. Maybe the sequence is much longer for GUID's that have bits set beyond the 2 least significant bytes.

Also the presence of a duplicate channel means the synchronization algorithm must be more sophisticated that we guessed. They would have to grab and decode multiple packets (at least 2) to be certain of a sync. This seems like a bad decision as it will prolong the time needed to sync.
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Old Nov 06, 2012, 06:46 PM
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Quote:
Originally Posted by racerxky View Post
I was trying to point out that at last one sequence has a repeat thats not the beginning of a new cycle:

a1d75ce4: 61 25 19 29 49 9 3 41 27 15 31 5 63 21 39 33 65 57 47 67 69 55 61 19
Duplicate Channel: 61
Duplicate Channel: 19

This sequence is the only one with higher order bits set. Maybe the sequence is much longer for GUID's that have bits set beyond the 2 least significant bytes.

Also the presence of a duplicate channel means the synchronization algorithm must be more sophisticated that we guessed. They would have to grab and decode multiple packets (at least 2) to be certain of a sync. This seems like a bad decision as it will prolong the time needed to sync.
0x61 is not a valid channel. This is likely just a bad sample. It is why I added the extra byte at the end to verify the data captured accurately. I'll recapture this GUID, but you should just ignore it.
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Old Nov 06, 2012, 06:56 PM
Watts is where its at!
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thats not 0x61, that base ten 61. I converted them from hex. Go aheads and recapture that one and some of its neighbors.
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Old Nov 06, 2012, 07:07 PM
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Quote:
Originally Posted by racerxky View Post
thats not 0x61, that base ten 61. I converted them from hex. Go aheads and recapture that one and some of its neighbors.
Ahh...well regardless, if the 1st and last numbers aren't the same, then the sequence should be considered invalid.
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Old Nov 06, 2012, 08:51 PM
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Here is what my 6201Rx gave me for your Dx4i's GUID:
Code:
1c10cb01: 34 04 26 1a 1e 3e 0c 14 40 44 48 06 42 08 3c 2e 10 32 4a 24 20 0e 1c 34
And here is the replacement for the line racerxky was looking at (I've updated the GUID list with these)
Code:
a1d75ce4: 3d 19 13 1d 31 09 03 29 1b 0f 1f 05 3f 15 27 21 41 39 2f 43 45 37 49 3d
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Old Nov 06, 2012, 09:37 PM
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Yes that is the sequence capture from DX4e binging as well.
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Old Nov 07, 2012, 05:21 AM
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OK, I get my system to work capturing the jumping sequence as well.
The only thing I need to change in dsm2.c is the time out for waiting after
sending the bind packet.
The reason I did not see the sequence before is the receiver is still
sending the packet back to the TX. The time out in your code is 5 second.
I change it to 8 second then it is working.

I think the TX need to receive the confirmation packet to switch to DSMX mode,
right? Otherwise how does it know the receiver can perform DSMX or not?
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Old Nov 07, 2012, 08:40 AM
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Quote:
Originally Posted by printk View Post
OK, I get my system to work capturing the jumping sequence as well.
The only thing I need to change in dsm2.c is the time out for waiting after
sending the bind packet.
The reason I did not see the sequence before is the receiver is still
sending the packet back to the TX. The time out in your code is 5 second.
I change it to 8 second then it is working.

I think the TX need to receive the confirmation packet to switch to DSMX mode,
right? Otherwise how does it know the receiver can perform DSMX or not?
Good to hear.
A real DSMX transmitter does need to wait for the response from the Rx, however, in the case that you know whether you want DSMX or DSM2 (like in Deviation) there isn't really any need. It does, however, tell you that binding was successful, which is a nice piece of information.
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Old Nov 10, 2012, 03:33 PM
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I still haven't figure out how to control the logic analyser GUI in command line.

That makes it hard to make the analyse fully automated.
I am pretty happy with the RPi controling the TX setup. I bought a second
RPi so I can use it to dump and parse the receiver side of of the SPI trace.

My second RPi arrived, I poke around and try to write a SPI traffic dumping.
Only to find out that Linux does not support SPI slave mode yet.
That is quite a surprise to me. Oh well, back to the microcontroller way
to dumping SPI.
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Old Nov 10, 2012, 03:54 PM
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Quote:
Originally Posted by printk View Post
I still haven't figure out how to control the logic analyser GUI in command line.
Have you tried sigrok? If your LA is supported, you can automate it from the cmdline. With the Saleae, I can stream forever. I haven't tried making an all in one package though. I'm afraid to use the RPi for capture since I don't want to introduce any additional context switches that might mess up the timing.
And yeah, the RPi can't do slave mode which is rather annoying. Ah well.
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Old Nov 12, 2012, 12:59 AM
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Not, I haven't try sigrok. I figure in the long run, a real SPI slave
micro controller to decode the message is more reliable and lighter
weight. This dumping is going to take all day long, I don't want
to keep my desktop running full speed all the time.

So after I fail to make RPi as SPI slave. I roll back to the MCPX MCU,
ATXMEGA16a4, which l already have some project running my custom
firmware. I solder up a new ATXMEGA16a4 on the MCPX board, because
I don't want to erase the factory firmware on the original MCU.

I re-route the receiver SPI bus to the ATXMEGA16a4 to replace the
original receiver SPI bus. I can reuse some of my SPI slave mode
code in my MCPX firmware project. I don't even need to cut the trace.
Just remove some protect resistor is good enough to reroute the SPI
bus.

I hook up the MCPX MCU debug port pin back to the RPi,
to read back the skipping sequence. The logic in MCU is very
simple. Skip to the first write TX_BUFFER command. Then the
channel write sequence is the sequence I want.

The is the full package I want, the RPi connect to the Walkera
TX using SPI master. It send the bind packet. MCPX receiver
bind to the TX and MCPX MCU are going to decode the sequence
and transfer back to RPi. Then RPi can know enough sequence
has been capture, it can terminate the MCPX to reboot. Ideally
RPi can even know when the MCPX enter bind mode. No time
wasted.

It take some time to code it up and debug it. I keep run into gcc
optimization bug which I have to reorder code a bit to resolve.
Take a few frustrating moment to short it out. I am pretty sure it
is a GCC bug not my memory order issue.

When I run the setup, I quickly find out my sequence did not match
with what you capture. I go back and redo the binding with DX4e.
Eventually I find out the secret. The MCPX receiver using a modify
sequence when it is seeking the alignment with the TX jumping
sequence. In this seeking mode, it is alternative channel in the
sequence is 11th apart. In other word, if I skip every other channel
in the seeking mode, I will get the jumping sequence in the receiving
mode. In the seeking mode, the receiver run 2 threads at half the
speed of the normal sequence.

Code:
 11050067 WRITE A0 [TX_BUFFER]  1C  10  CB  01  01  07  A2  00  03  12
 11057302 WRITE A0 [TX_BUFFER]  1C  10  CB  01  01  07  A2  00  03  12
 11122983 WRITE 80 [CHANNEL]  34 [Channel:34]
 11133280 WRITE 80 [CHANNEL]  06 [Channel:6]
 11143225 WRITE 80 [CHANNEL]  04 [Channel:4]
 11153417 WRITE 80 [CHANNEL]  42 [Channel:42]
 11163350 WRITE 80 [CHANNEL]  26 [Channel:26]
 11173539 WRITE 80 [CHANNEL]  08 [Channel:8]
 11183482 WRITE 80 [CHANNEL]  1A [Channel:1a]
 11193680 WRITE 80 [CHANNEL]  3C [Channel:3c]
 11203615 WRITE 80 [CHANNEL]  1E [Channel:1e]
 11211312 READ  21 [RX_BUFFER]  34  FE  0C  02  10  34  FE  0C  02  2C  66  13  FC  24  00  1C
 11213804 WRITE 80 [CHANNEL]  2E [Channel:2e]
 11223758 WRITE 80 [CHANNEL]  3E [Channel:3e]
 11233946 WRITE 80 [CHANNEL]  10 [Channel:10]
 11243894 WRITE 80 [CHANNEL]  0C [Channel:c]
 11254079 WRITE 80 [CHANNEL]  32 [Channel:32]
 11264024 WRITE 80 [CHANNEL]  14 [Channel:14]
 11274212 WRITE 80 [CHANNEL]  4A [Channel:4a]
 11284149 WRITE 80 [CHANNEL]  40 [Channel:40]
 11294333 WRITE 80 [CHANNEL]  24 [Channel:24]
 11304275 WRITE 80 [CHANNEL]  44 [Channel:44]
 11314457 WRITE 80 [CHANNEL]  20 [Channel:20]
 11324401 WRITE 80 [CHANNEL]  48 [Channel:48]
 11334589 WRITE 80 [CHANNEL]  0E [Channel:e]
 11344532 WRITE 80 [CHANNEL]  06 [Channel:6]
 11354722 WRITE 80 [CHANNEL]  1C [Channel:1c]
 11364659 WRITE 80 [CHANNEL]  42 [Channel:42]
 11374852 WRITE 80 [CHANNEL]  34 [Channel:34]
 11384782 WRITE 80 [CHANNEL]  08 [Channel:8]
 11394968 WRITE 80 [CHANNEL]  04 [Channel:4]
 11404915 WRITE 80 [CHANNEL]  3C [Channel:3c]
 11415107 WRITE 80 [CHANNEL]  26 [Channel:26]
 11425037 WRITE 80 [CHANNEL]  2E [Channel:2e]
 11435226 WRITE 80 [CHANNEL]  1A [Channel:1a]
 11445170 WRITE 80 [CHANNEL]  10 [Channel:10]
 11455360 WRITE 80 [CHANNEL]  1E [Channel:1e]
 11456797 READ  21 [RX_BUFFER]  34  FE  0C  02  2C  66  13  FC  24  00  10  34  FE  0C  02  2C
 11465301 WRITE 80 [CHANNEL]  32 [Channel:32]
 11475492 WRITE 80 [CHANNEL]  3E [Channel:3e]
 11479508 READ  21 [RX_BUFFER]  34  FE  0C  02  2C  66  13  FC  24  00  1C  00  30  00  00  C0
 11497413 WRITE 80 [CHANNEL]  34 [Channel:34]
 11507708 WRITE 80 [CHANNEL]  06 [Channel:6]
 11517647 WRITE 80 [CHANNEL]  04 [Channel:4]
 11527838 WRITE 80 [CHANNEL]  42 [Channel:42]
 11537771 WRITE 80 [CHANNEL]  26 [Channel:26]
 11547959 WRITE 80 [CHANNEL]  08 [Channel:8]
 11557902 WRITE 80 [CHANNEL]  1A [Channel:1a]
 11568097 WRITE 80 [CHANNEL]  3C [Channel:3c]
 11578033 WRITE 80 [CHANNEL]  1E [Channel:1e]
 11588223 WRITE 80 [CHANNEL]  2E [Channel:2e]
 11598171 WRITE 80 [CHANNEL]  3E [Channel:3e]
 11608354 WRITE 80 [CHANNEL]  10 [Channel:10]
 11618297 WRITE 80 [CHANNEL]  0C [Channel:c]
 11628483 WRITE 80 [CHANNEL]  32 [Channel:32]
 11638423 WRITE 80 [CHANNEL]  14 [Channel:14]
 11648608 WRITE 80 [CHANNEL]  4A [Channel:4a]
 11658548 WRITE 80 [CHANNEL]  40 [Channel:40]
 11668733 WRITE 80 [CHANNEL]  24 [Channel:24]
 11678677 WRITE 80 [CHANNEL]  44 [Channel:44]
 11688860 WRITE 80 [CHANNEL]  20 [Channel:20]
 11698802 WRITE 80 [CHANNEL]  48 [Channel:48]
 11708986 WRITE 80 [CHANNEL]  0E [Channel:e]
 11718931 WRITE 80 [CHANNEL]  06 [Channel:6]
 11729120 WRITE 80 [CHANNEL]  1C [Channel:1c]
 11739056 WRITE 80 [CHANNEL]  42 [Channel:42]
 11749242 WRITE 80 [CHANNEL]  34 [Channel:34]
 11759173 WRITE 80 [CHANNEL]  08 [Channel:8]
 11769360 WRITE 80 [CHANNEL]  04 [Channel:4]
 11779307 WRITE 80 [CHANNEL]  3C [Channel:3c]
 11789500 WRITE 80 [CHANNEL]  26 [Channel:26]
 11799430 WRITE 80 [CHANNEL]  2E [Channel:2e]
 11809620 WRITE 80 [CHANNEL]  1A [Channel:1a]
 11819562 WRITE 80 [CHANNEL]  10 [Channel:10]
 11829749 WRITE 80 [CHANNEL]  1E [Channel:1e]
 11839682 WRITE 80 [CHANNEL]  32 [Channel:32]
 11849869 WRITE 80 [CHANNEL]  3E [Channel:3e]
 11859807 WRITE 80 [CHANNEL]  4A [Channel:4a]
 11869989 WRITE 80 [CHANNEL]  0C [Channel:c]
 11879942 WRITE 80 [CHANNEL]  24 [Channel:24]
 11890123 WRITE 80 [CHANNEL]  14 [Channel:14]
 11900063 WRITE 80 [CHANNEL]  20 [Channel:20]
 11910244 WRITE 80 [CHANNEL]  40 [Channel:40]
 11920182 WRITE 80 [CHANNEL]  0E [Channel:e]
 11930367 WRITE 80 [CHANNEL]  44 [Channel:44]
 11940306 WRITE 80 [CHANNEL]  1C [Channel:1c]
 11950494 WRITE 80 [CHANNEL]  48 [Channel:48]
 11960428 WRITE 80 [CHANNEL]  34 [Channel:34]
 11970608 WRITE 80 [CHANNEL]  06 [Channel:6]
 11980552 WRITE 80 [CHANNEL]  04 [Channel:4]
 11990737 WRITE 80 [CHANNEL]  42 [Channel:42]
 12000670 WRITE 80 [CHANNEL]  26 [Channel:26]
 12010858 WRITE 80 [CHANNEL]  08 [Channel:8]
 12020800 WRITE 80 [CHANNEL]  1A [Channel:1a]
 12030993 WRITE 80 [CHANNEL]  3C [Channel:3c]
 12040924 WRITE 80 [CHANNEL]  1E [Channel:1e]
 12051111 WRITE 80 [CHANNEL]  2E [Channel:2e]
 12061055 WRITE 80 [CHANNEL]  3E [Channel:3e]
 12071238 WRITE 80 [CHANNEL]  10 [Channel:10]
 12081185 WRITE 80 [CHANNEL]  0C [Channel:c]
 12091372 WRITE 80 [CHANNEL]  32 [Channel:32]
 12101306 WRITE 80 [CHANNEL]  14 [Channel:14]
 12111492 WRITE 80 [CHANNEL]  4A [Channel:4a]
 12117078 READ  21 [RX_BUFFER]  34  FE  0C  02  2C  66  13  FC  24  00  1C  00  30  00  00  C0
 12124565 WRITE 80 [CHANNEL]  24 [Channel:24]
 12135034 READ  21 [RX_BUFFER]  34  FE  0C  02  2C  66  13  FC  24  00  1C  00  30  00  00  C0
 12136751 WRITE 80 [CHANNEL]  20 [Channel:20]
 12139068 READ  21 [RX_BUFFER]  34  FE  0C  02  2C  66  13  FC  24  00  1C  00  30  00  00  C 12139068 READ  21 [RX_BUFFER]  34  FE  0C  02  2C  66  13  FC  24  00  1C  00  30  00  00  C0
 12140203 WRITE A0 [TX_BUFFER]  7F  00  00  00  00  00  00  00  00  00  00  00  00  00  FF  FF
 12146577 WRITE 80 [CHANNEL]  0E [Channel:e]
 12157012 READ  21 [RX_BUFFER]  34  FE  0C  02  2C  66  13  FC  24  00  1C  00  30  00  00  C0
 12158731 WRITE 80 [CHANNEL]  1C [Channel:1c]
 12161048 READ  21 [RX_BUFFER]  34  FE  0C  02  2C  66  13  FC  24  00  1C  00  30  00  00  C0
 12162173 WRITE A0 [TX_BUFFER]  7F  00  00  00  00  00  00  00  00  00  00  00  00  00  FF  FF
 12168550 WRITE 80 [CHANNEL]  34 [Channel:34]
 12179011 READ  21 [RX_BUFFER]  34  FE  0C  02  2C  66  13  FC  24  00  1C  00  30  00  00  C0
 12180723 WRITE 80 [CHANNEL]  04 [Channel:4]
 12183039 READ  21 [RX_BUFFER]  34  FE  0C  02  2C  66  13  FC  24  00  1C  00  30  00  00  C0
 12184166 WRITE A0 [TX_BUFFER]  7F  00  00  00  00  00  00  00  00  00  00  00  00  00  FF  FF
 12190545 WRITE 80 [CHANNEL]  26 [Channel:26]
0
I just discover this. Going to back to code hacking and make this
a full automated package.
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