Originally Posted by simonk
It needs some pictures to really make sense (there are three basic layouts: P-FETs and N-FETs with NPNs on the P-FETs, all-N-FETs with NPNs on the high (originally P) side, and all-N-FETs with gate driver chips -- usually 8-pin things per phase). But for now, I pushed some updates I was working on to the README here: https://github.com/sim-/tgy
not so obvious. Sorry
Could one make annotations on these images to explain the layout?
What i found so far:
6679Z = MOSFET P-CH 30V 20A 8-SOIC
F7832 = MOSFET N-CH 30V 20A 8-SOIC
AMS1117 = 800mA LOW DROPOUT VOLTAGE REGULATOR