Brushless feedback explanation

[Hell-e-Guy]

Hi Guys,

Can someone please give a short explanation on the analog feedback ( the three comparators ) connections of this BLDC design :
http://home.versanet.de/~b-konze/blmc_bko/schaltplan.htm

I think the design was made by a forum member...

I tired to figure it out with no success... too many resistor...

Thanks!

[Acetronics]

Hi, Hell ...

I'm sure someone called " Quax" could give you the answer ... if he dares.

Alain

[william541]

It looks like 3 comparator circuits where the inverting input is the vector sum of two phases and used as a reference. Then the single phase is fed to the non-inverting input. If the single phase is higher than the vector sum of the other two phases, then the op-amps output goes high. If you re-draw this part of the schematic it is a bit easier to see. I'm guessing he is using this to monitor the back EMF of the motor to control the slip. -Bill-

[jeffs555]

One input on each comparator comes from a voltage divider from one coil(the undriven coil), and the other input comes from a voltage divider from both of the other two coils(the driven coils). The resistors from the driven coils form reference that is the center point between the two driven coils divided by a fixed amount. The resistors from the undriven coil divide by the same amount so that when the back emf from the undriven coil is halfway between the two driven coils, the comparator changes.

[quax]

One input on each comparator comes from a voltage divider from one coil(the undriven coil), and the other input comes from a voltage divider from both of the other two coils(the driven coils). The resistors from the driven coils form reference that is the center point between the two driven coils divided by a fixed amount. The resistors from the undriven coil divide by the same amount so that when the back emf from the undriven coil is halfway between the two driven coils, the comparator changes.
I couldn't have said it better, thanks :)

To the next, who will ask this, I will send your explanation :D , I added it to my docs.

Regards

Quax ( alias ~b-konze ;) )

[Hell-e-Guy]

Guys, thanks for all the detailed answers !!!
I built a BLDC ESC a year ago with the cypress psoc, but used the VCC/2 as the crossing point (used it as a reference for the psoc's internal comparators).
When I ran into this design I was puzzled by the number of resistors...
but I see the advantages...good comparator with low offset can give very very accurate commutations...no ADC means a very high RPM capability...and ALOT ALOT of time for the micro to handle a bunch of tasks!
Quax, did you follow some application note or reference design?

Anyway, great job!!!

Again, Thanks.

[quax]

I found it anywhere. During the first phase I tested about 4 or 5 different application notes concerning the BEMF evaluation. This was the best, because of the real reference built by the powered phases.

The very special advantage is, that it works also in poweroff time of the PWM. Then the current continues to flow through parasitic diode of the complementary PFET of the same halfbridge and this phase generates a lower voltage as the powered PFET of the other halfbridge. If the motor is running and the speed is lets say higher than 2400 electrical-RPM, you can evaluate the BEMF during PWM high AND low cycle. But you have to evaluate twice the result because of jitters that occur during on/off switches. This description assumes, that the NFETs are switched for power-PWM.



regards
quax

[Hell-e-Guy]

Hi Quax,
Thanks for your remarks!
Do you poll or enable interrupts all the time or just during the PWM high time ?
I didn't quit understand this point from your answer...
Correct me if I'm wrong... you always poll the comparators output but when you
get a change you double check to see if it was a jitter or a real reading.

I would be glad if you can link the article you read about time technique..

[quax]

....
Correct me if I'm wrong... you always poll the comparators output but when you get a change you double check to see if it was a jitter or a real reading.
Exact, but it works only on higher RPM, not at startup. But only at higher RPM it's really important for an exact timing.

I can't remember all links I went through :rolleyes:
My favourite docs are:
http://focus.ti.com/general/docs/lit/getliterature.tsp?literatureNumber=bpra072&fileType=pdf
http://scholar.lib.vt.edu/theses/available/etd-09152003-171904/unrestricted/T.pdf
http://www.fairchildsemi.com/an/AB/ABR-42020.pdf
http://ww1.microchip.com/downloads/en/AppNotes/00857a.pdf

Regards
Quax

[Hell-e-Guy]

Quax, U the man !!!

[dleroi]

Maybe a little off-topic, but is anyone using their back emf monitoring circuitry as the basis for an rpm display?

Regards,
Don LeRoi

[quax]

Maybe a little off-topic, but is anyone using their back emf monitoring circuitry as the basis for an rpm display?

Regards,
Don LeRoi
The BEMF does not produce square pulses according to the RPM. Only the phase that is not powered does produce a zero crossing. Is the phase powered, it will produce unexpected pulses like the power PWM and more.
In some cases you can use the gate voltage of that FET in the halfbridge, that follows only the commutation and doesn't perform the power PWM. But not all BL-ESC have this behaviour.

Regards
Quax

[dleroi]

Thanks, Quax.

That's actually where I was going with the idea - counting the commutations, then doing the math. I'm going to build it.

- Don

[Hell-e-Guy]

In this design, after a comparator changes do you have to wait 30 electrical degrees and then commutate the next pair of phases ?

[Hell-e-Guy]

anyone ?????

[Ron van Sommeren]

MOre BLDC design discussion:
http://www.rcgroups.com/forums/showthread.php?t=200567&page=86&pp=15

Vriendelijke groeten ;) Ron