SPI multi-master mode idea

[weazuul]

I have an idea about a multi-master SPI but i dont know if it will work so I want to ask first to be sure. The way I have thought of supports a maximum of 4 devices due to the use of CPHA and CPOL for a crude form of addressing and elimination of multiple Slave Selects.
There are only 5 lines: MISO, MOSI, SCK, /SS, and a 5-th pin to keep other MCU's from becoming masters(let's call it MD).
Initially all devices start in slave mode, each one with a different CPHA and CPOL combination thus the maxim 4 devices allowed . If one device needs to become master checks the MD line so they see if there is another master active, and if not it raises MD and swithes from slave to master, changes it's CPHA and CPOL according to the device it needs to talk to, raises /SS, sends data and then changes back it's CPHA and CPOL(to their initial values), changes to slave mode and releases the MD line.
Now the only problem seems to come from using CPHA and CPOL because there are more devices on the same /SS line and they arent daisy chained.
Do you guys think this could work?

[Mr.RC-CAM]

My gut feeling is that there will often be times when the "idle" SPI slaves will capture data in their rx buffer. I suppose with packet checksums you may be able to mask out such ghosted communications. In the end, it might work just fine, but be prepared with a backup plan.

FWIW, your MD line should be checked by the host using a random time delay. That way the possibility of two masters getting it at the same time would be reduced.

[weazuul]

true i will need to do some checksum and find a way to implement buss arbitration if 2 masters or more take control at the same time. keep you posted with what i find