Need Advice with Data Slicer on TA31136 Demod IC

[Mr.RC-CAM]

I am currently hacking a store-bought R/C receiver (it is a long story). The software part is essentially done. Beside some other things, I added the ability to auto shift detect for universal Tx use.

However, I have run into a snag. It uses the TA31136 FM demodulator IC. Because this component does not have a Data Output, it must use the audio output and be conditioned by a data slicer stage before going into the decoder (a PIC).

The existing hardware is an AC coupled transistor buffer, as shown in the schematic below. It is designed to handle the Futaba shift. But, due to a DC Restore issue, it cannot deal with JR shift unless I physically install R3. If I had a spare pin on the microcontroller I would be able to switch the resistor in and out of the circuit. But, I ran out of pins on the PIC.

So, here is the challenge. How can I hack the hardware, without disturbing the existing layout, so that both shifts are handled reliably? I do not mind removing or adding a couple of parts, but the ideal fix would minimize that sort of activity. Anyone have any circuits that they have used that might apply to what is shown below?

BTW, I have reviewed the typical transistor buffer that is used on the popular MC3362 sort of designs and they do not apply. Those sort of demod chips have a conditioned data output, which solves the problem very nicely. But that is not an option here. :)

RC-CAM

[shoutchen]

try this for ideas...??


http://home.hvc.rr.com/bpetrow/

[jeffs555]

How about this. It should give you about a 160uS positive pulse on every negative edge of the incomming signal. If it is for a standard PPM signal, that is all you should need to decode it in the PIC.

[Mr.RC-CAM]

try this for ideas...??
Thanks. Those designs are substantially different than the existing circuit. My goal is to minimize the change so that I can use the existing board layout. Perhaps someone clever can help me tweak/rearrange the existing components to suit the application.


How about this. It should give you about a 160uS positive pulse on every negative edge
I had tried out other circuit (it is nearly the same as something I prototyped earlier today) and it did not solve the problem.

RC-CAM

[Mr.RC-CAM]

FWIW, I can get both shifts' signal to appear at the output if C1 is .1uF and a 47K is placed from gnd to the Q1-b. However, the syncs' widths are truncated in the Pos Shift mode.

This is a problem because part of my software performs sync comparisons in each R/C frame to determine corruption (it is one of many clues I use to qualify a frame). So, I have to see the full sync profile to do that. There are several elements of the frame that are measured and used to make a judgement on whether or not the frame is valid. So, I need to see the PPM frame's profile in vast detail without degradation.

The R-C values can be moved around and the problem just moves from here to there. No doubt there is an arrangement that will work for me without too much fuss. But, it is just not obvious to me. I could fix this with a traditional OPAMP data slicer (I am good at those) but that would not fit on the existing board's layout.

RC-CAM

[jeffs555]

If you need to see the real PPM signal to do your signal qualification, I don't see any easy way to get it without major modifications.

If you can live with only seeing the incomming negative edges, the low value C1 should work. You will be able to see everything except the actual width of the incomming 0.5mS pulses. With the low value series cap C1 acting as a differentiator, the DC restore level shouldn't matter, and the signal and sync widths should not change with pos or neg shift. What is the AC P-P level of the DEMOD signal? I simulated the circuit I posted with a 0.5v P-P input, and it doesn't matter what the DC level is. If DEMOD is much less than 0.5v P-P you may have to increase the base pullup to 500k-1meg, and possibly change the value of C1, but there should be some combination of C1 and base pullup that will give you a clean positive output pulse on each negative edge of the input.

[Phil Cole]

The usual way to do DC restoration is a clamp diode. It would replace the extra resistor you show from Q1's base to ground. The anode goes to ground, and the cathode to the base.

You need enough signal level to forward bias both the diode and the transitor BE junctions.

The diode will clamp the most -ve excursion of the base voltage to -0.6 V, assuming a silicon diode.

To figure out which shift you are receiving you will have to look for the 300 us channel pulses and figure out which way they are going. With no signal input, the slicer output will always sit at the asserted pulse state for one of the possible shift polarities, and sit at the no-pulse state for the other shift polarity.

You may have to use the 100K resistor to ground the base rather than biasing Q1 on.

[Mr.RC-CAM]

What is the AC P-P level of the DEMOD signal?
Pos Shift is ~750mV, Neg Shift is ~550mV.


... but there should be some combination of C1 and base pullup that will give you a clean positive output pulse on each negative edge of the input.
I have several dozen values of C's ranging from .01 to .47uF (and beyond) and R's that range from 10K to 470K. C1 values under .1uF don't work well at all, even with scaled R's at R4 (ref's per your schematic). I can find combo's that are close to working well, but the fidelity is just not right. The circuitry shown in the first post does provide a work around, but requires switching the additional 10K in and out. I may have to live with that.


The usual way to do DC restoration is a clamp diode. It would replace the extra resistor you show from Q1's base to ground.
Phil, I did the diode clamp trick this afternoon, except I had anode to base and cathode to gnd, with a series resistor to prevent a full Q1 clamp. It nearly helped, but was goofy on one of the shifts. I just tried the other way (anode to gnd per your comment) and it acts the same as if the diode was not in the circuit. Even with the 100K to gnd. I re-biased it with other combos of pos and neg bias resistor values, and it just causes the grief to move from here to there.

I appreciate all the advice!

RC-CAM

[AndyKunz]

10 years ago, when I was working on what Fred Marks sells as the "SMART" technology receivers, I did a lot of checking into the received data. In short, what I found was that you shouldn't rely on the ABSOLUTE pulse width, but the frame-to-frame comparison. Essentially, once your decoder "knows" what the transmitter looks like that it is decoding, it can lock onto those parameters (with some jitter of pulse widths) and then use that for future comparisons rather than an absolute width.

In other words, use the .1/47K combo and let the software figure it out from there.

This was especially important for properly decoding the correct transmitter when there was another on the same channel (we could discern the right transmitter even when it was at significantly lower signal level than the wrong one).

The hardest part of the whole project was dealing with analog transmitters (Fred was big on supporting the ACE stuff) which didn't always have a fixed frame rate - they would vary depending on the width of the data pulses. That is pretty much a gone-away problem now, but should still be supported for 100% compatibility.

Contact me offline if you have questions.

Andy

[Mr.RC-CAM]

In short, what I found was that you shouldn't rely on the ABSOLUTE pulse width, but the frame-to-frame comparison.
I agree. The syncs' widths are compared to historical sync data, with an allowance for jitter.


In other words, use the .1/47K combo and let the software figure it out from there.
With those values (or other small C-values), the syncs are truncated in width. So if they vary in length, I will never know it. Mangled syncs look like good ones.

RC-CAM

[JMP_blackfoot]

IMHO, if the RC values are chosen carefully, a shorter synch will not allow the capacitor to charge so much, and the resulting differentiated pulse will also be shorter.

[Mr.RC-CAM]

For an immediate solution, I decided to revert to an earlier idea of a DC coupled stage. I was trying to avoid this since the data sheet did not offer any specs to the AF Out's V-offset. But, looking at the Toshiba and NJR specs together, it appears that it should be Ok. That assumes their 31136's are the same.

Below is the circuit that I will use for now. It supports both shifts, provides nice signal fidelity, and has survived my torture tests. If something better comes along I will give it a go too.

Thanks to everyone for their advice. It is appreciated!

RC-CAM

[Phil Cole]

Mr RC,

The AC coupling was probably used to accommodate some frequency offset between the transmitter and receiver. If this is a concern a simple AFC loop could help.

With the signal levels you're getting, the clamp won't work. You'd need at least two diode forward drops p-p (one for the clamp and one for the transistor) for the clamp to do its stuff. Maybe a Schottky diode clamp would work, though I doubt it.

[mikrodon]

Mr RC,

The AC coupling was probably used to accommodate some frequency offset between the transmitter and receiver.

You are correct. The DC level out from the TA31136 will vary as a function of the TX and RX frequency mismatch. This is one reason why very accurate RX crystals are so important. I recommend using an AC coupled circuit.

mikrodon

[Mr.RC-CAM]

Phil Cole and mikrodon, Thanks for the follow up. I had come to realize that too. The AC coupling is the way to go.

RC-CAM

[mikrodon]

By the way RC-CAM, did you get my PM? :)

mikrodon

[Mr.RC-CAM]

By the way RC-CAM, did you get my PM?
Yes. I responded with a PM back to you the same day.

RC-CAM